By Esteban Tlelo-Cuautle
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Extra info for Advances in Analog Circuits
Here are some of the evidences for the challenges discussed: • No matter how complex, the nonlinearity is entirely removed and replaced with the linearized equivalent circuits for biasing. • If selected, each transistor (nonlinear component) is individually biased to the selective and desirable operating points without affecting the rest of the circuit. • Local biasing minimizes the DC power consumption in the circuit. In general, the methodology can be used to monitor the DC power consumption in a circuit and direct it so that one can reduce the power effectively.
5V M2 M3 500 KΩ Fig. 22. Design stages of a CMOS differential amplifier Note, in this example, that the choice of two current sources replacing the norators is only one option. Here the source resistance for each current source happens to be infinity, but this is not a requirement. In fact, any component, or combination of components as a twoterminal circuit, is permissible to replace the norator, say norator I1, provided that the DC current through the two-terminal amounts to the current I1, and the voltage across the twoterminal is the same as that obtained for the norator I1, in the circuit simulation.
5V, as expected. Example 9: The purpose of this example is to complete the design of a CMOS differential amplifier with a buffer stage. Figure 24(a) depicts the circuit configuration. As shown, the performance design of the amplifier is completed giving the transistor sizes listed in Table X. 41 A New Approach to Biasing Design of Analog Circuits Fig. 23. 5V Fig. 24. (a) A CMOS differential amplifier with buffer stage; (b) biasing design procedure for the amplifier To complete the biasing design we need to do the following: i) specify the biasing voltage Vb so that we can get a current sink of IS = 20 μA, and ii) specify the current mirror ID in the buffer stage so that the output offset voltage Vout = 0.